1. Field of the Present Invention
The present invention relates generally to chip carrier packages for semi-conductor integrated circuit chips and, more particularly, to a homogeneous chip carrier package for semi-conductor integrated circuit chips.
2. Description of Related Art
In the electronic industry, it is conventional in the prior art to encapsulate semi-conductor devices such as integrated circuit chips in chip carrier packages. Chip carrier packages protect a chip from environmental hazards, and provide means for electrically and mechanically attaching the chip to an intended device. A primary focus in the design of a chip carrier package is to provide the chip with adequate protection from the external environment.
One prior art approach for designing a chip carrier package to provide adequate protection from the external environment is the total encasement chip carrier package (TE package). The TE package general includes a lead frame having a chip die mounting pad, an integrated circuit chip die which is attached to the chip die mounting pad, a plurality of fragile wires which connect the chip die to the lead frame, and a thermoset plastic which total encases the lead frame, the chip die and the plurality of fragile wires. The TE package has several problems which arise from the thermoset plastic's direct contact with the chip die and the plurality of fragile wires. First, the thermoset plastic's direct contact with the plurality of fragile wires, which connect the chip die to the lead frame. The molding process may cause a disruption of the planarity or spacing of the fragile wires, which can produce electrical shorting of the plurality of fragile wires, thus, resulting in chip failure or damage. Second, different coefficients of thermal expansion exist for the chip die, the lead frame, the plurality of fragile wires and the thermoset plastic. Materials having different coefficients of thermal expansion expand and contract at different rates during temperature variations. Temperature variations are produced during the molding process of the TE package, during final solder attachment of the TE package to the intended device board and during the operation of the chip within the TE package. The temperature variations provide the possibility for disassociation of the thermoset plastic from the chip die and the plurality of fragile wires. Disassociation of the thermoset plastic from the chip die and the plurality of fragile wires produces chip failure and/or damage resulting from wire stress failure or wire bond connection failure. The temperature variations further provide the possibility for the formation of voids. Third, the thermoset plastic utilized in the manufacture of the TE package exhibits hygroscopic properties. The hygroscopic properties of the TE package allow moisture to enter and accumulate in the formed voids. High temperatures are required during the final solder attachment of the TE package to the intended device. The high temperatures can convert the moisture, located within the formed voids, into steam, thereby expanding and cracking the TE package or the chip die.
Another prior art approach for designing a chip carrier package to provide adequate protection from the external environment is a cavity package. The cavity package generally includes a lead frame having a plurality of lead members and a chip die mounting pad, an integrated circuit chip die attached to the chip die mounting pad, a plurality of fragile wires which connect the chip die to the plurality of lead members, a thermoset plastic which is, formed around the lead frame and the chip die mounting pad in such a manner as to provide a cavity, and a thermoset molded lid which is attached to the cavity by a thermoset adhesive. The cavity package has several problems associated with its manufacture. First, some of the plurality of lead members have their planarity compromised during the process of molding or injecting the thermoset plastic around the lead frame and the chip die mounting pad. Each one of the plurality of lead members which has its planarity compromised increases the difficulty in connecting an associated fragile wire from the chip die to the compromised lead member. Second, during the molding or injecting process, the chip die mounting pad and the plurality of lead members may also be partially, or in some cases, totally, covered with the thermoset plastic material, causing extensive cleaning steps to remove the thermoset plastic material prior to connecting the plurality of fragile wires. Molding apparatus systems have been designed to address certain of these issues. However, the molding apparatus systems are expensive and require costly maintenance. Third, the thermoset plastic which is utilized in the manufacture of the cavity package exhibits hygroscopic properties. The hygroscopic properties of the thermoset plastic allow moisture to enter the cavity. Chemical leaching is produced from the contact of the moisture with the thermoset plastic within the cavity. Leached chemicals, within the cavity, can be in contact with the plurality of fragile wires and/or chip die. The leached chemicals can result in the shorting of the plurality of fragile wires, thus, producing chip failure. High temperatures are generated within the cavity during the process of attaching the cavity package to an intended device and during the operation of the chip. The generated high temperatures convert moisture within the cavity to steam, thereby expanding and cracking the thermoset molded lid and/or damage to the chip.
A further approach by the prior art for designing a chip carrier package to provide adequate protection from the external environment is a substrate cavity package. A substrate cavity package (SC package) generally includes a laminated thermoset circuit substrate having an etched chip die mounting pad and a plurality of etched inner lead traces, a lead frame having a plurality of lead members which are soldered to the plurality of etched inner lead traces, an integrated circuit chip die attached to the chip die mounting pad, a plurality of fragile wires which connect the chip die to the plurality of the inner lead traces, a thermoset plastic which is formed around the lead frame, inner lead traces and the chip die mounting pad in such a manner as to provide a cavity, and a thermoset molded lid which is attached to the cavity by a thermoset adhesive. The SC package alleviates the planarity problems associated with the cavity package, however, several other problems are present.
First, the thermoset plastic, the thermoset adhesive and the thermoset circuit substrate all exhibit hygroscopic properties which allow moisture to enter the cavity of the SC package and the thermoset circuit substrate. Chemical leaching is produced from the contact of the moisture with the thermoset plastic within the cavity. Leached chemicals, within the cavity, can be in contact with the plurality of fragile wires, the chip die and/or the plurality of inner lead traces. The leached chemicals can result in the shorting of the plurality of fragile wires or in the corrosion of the plurality of inner lead traces. The shorting or the corrosion can produce chip failure. High temperatures are generated within the cavity during the process of attaching the SC package to an intended device. The generated high temperatures convert moisture within the cavity and the thermoset circuit substrate to steam. The steam within the cavity expands and may result in the cracking of the thermoset molded lid and/or damage to the chip. The steam within the thermoset circuit substrate may also produce delamination internal to the circuit substrate and/or some of the inner lead traces and chip die mounting pad. The delaminated inner lead traces and/or the delaminated chip die mounting pad can result in the shorting of the delaminated inner lead traces or the loss of electrical connections between the chip die and the lead traces. The shorting of the delaminated inner lead traces and/or the loss of electrical connections produces chip failure. Second, the thermoset plastic, the thermoset adhesive and the thermoset circuit substrate all have different coefficients of thermal expansion. High temperature variations are generated during the process of attaching the SC package to an intended device. The generated high temperature variations result in the loss of mechanical adhesion, between the thermoset plastic and the thermoset circuit substrate, and between the thermoset plastic and the thermoset molded lid. The loss of mechanical adhesion results from the thermoset plastic, the thermoset circuit substrate and the thermoset molded lid all having different coefficients of thermal expansion. The loss of mechanical adhesion between the thermoset molded lid and the thermoset plastic produces a path for moisture to enter the cavity. Moisture within the cavity creates the same chemical leaching, delamination and cracking problems as discussed above with the hygroscopic properties of the SC package.
Other prior art approaches for designing a chip carrier package to provide adequate protection from the external environment include variations to the SC package without a thermoset molded lid. The variation packages utilize a sealant which completely covers the chip die, the thermoset circuit substrate and the plurality of fragile wires. Several problems exist, however, for the variation packages. First, the sealant is expensive and adds to the cost of production for the variation packages. Second, some semi-conductor devices, such as microprocessors cannot have direct contact between the chip die and the sealant.
A further attempt at designing a chip carrier package to provide adequate protection from the external environment is the ceramic cavity chip carrier package (CCC package). However, the CCC package is more expensive and has been referred to as cost prohibitive.
I t would be an advantage therefore to have a homogeneous chip carrier cavity package (HC package) which utilizes the same thermoplastic for the various integral attachments to the HC package, such as, the molded lid and the circuit substrate. Since the various integral attachments are all comprised of the same thermoplastic as the HC package, a chemical bonding or fusing of the integral attachments to the HC package may be utilized to provide adequate protection from the external environment. The HC package eliminates the problems associated with having different coefficients of thermal expansion and moisture entering the cavity.